Processing systems typically include a microprocessor, associated memory, control, interface and other circuitry and peripheral systems such as a data/address/control bus, a bus interface, external memory devices such as disk and/or CD ROM, and a user interface system including keyboard, mouse, display, etc., along with associated interface circuitry including additional memory, device drivers, etc. Conventionally, each processing system is associated with and is designed to operate with its own unique set of program instructions, and each instruction set is specifically designed to be executed by its associated microprocessor.
Today, the personal computer market is dominated by systems that include one of the Intel family of microprocessors, which includes the 286, 386, 486 and Pentium.TM. microprocessors, manufactured by Intel Corporation of Santa Clara, Calif. These microprocessors execute an x86 instruction set and are therefore considered complex instruction set computer (CISC) processors. As the name suggests, the x86 instruction set is characterized by a large number of complicated instructions which can be difficult for microprocessors to decode and also can be relatively slow to execute, in comparison with simpler instruction sets.
In an effort to improve processing speed, some manufacturers have developed reduced instruction set computer (RISC) processors. These processors execute instructions from a RISC instruction set which is substantially simplified compared to the x86 CISC instruction set. In a typical RISC instruction set, such as the instruction set designed to operate with the alpha microprocessor manufactured by Digital Equipment Corporation of Maynard, Mass., multiple steps of an operation, each of which would have its own instruction in a CISC system, are divided into many RISC instructions. This results in greatly improved program compile and execution speed.
Despite the improvements in efficiency realized by RISC processors, they have been slow to break into the personal computer market, since the x86 processors have become the de facto standard. Most of the available system hardware has been standardized to work with the dominant x86 processors. Supporting hardware such as x86 mother boards are being mass produced at very low cost. Meanwhile, RISC mother boards and other hardware, which must be customized to the particular microprocessor since not many standards exist, can be several times more expensive to produce than their x86 CISC counterparts.
Also, most of the available software, including applications and operating systems such as Windows95.TM. by Microsoft Corporation of Redmond, Wash., was developed to be compatible only with the x86 CISC instruction set. Therefore, even if the hardware issues could be successfully addressed, software compatibility would remain a major obstacle to RISC systems.
It has been proposed to overcome these problems by using a RISC processor to operate from a CISC instruction set, particularly the x86 instruction set. For example, in developing its next generation "Merced" microprocessor with Hewlett-Packard Company of Palo Alto, Calif., Intel has described in U.S. Pat. No. 5,638,525, entitled "Processor Capable of Executing Programs that Contain RISC and CISC Instructions," an entirely new RISC microprocessor which is capable of executing x86 instructions. In one configuration, the microprocessor has been redesigned to include on-chip translation circuitry which translates an x86 instruction to an associated RISC instruction. A new on-chip "execution unit" then executes the translated RISC instruction. Exponential Technology, Inc. of San Jose, Calif. also describes a redesigned RISC microprocessor with on-chip CISC and RISC instruction decoding and execution in addition to on-chip CISC instruction emulation in U.S. Pat. No. 5,598,546, entitled "Dual-Architecture Super-Scalar Pipeline."
Digital Equipment Corporation (DEC) has developed an instruction translator in software. DEC's FX!32 software can translate x86 instructions to RISC instructions for execution by its Alpha.TM. RISC microprocessor.
These prior approaches have certain drawbacks that can cause inefficiencies in system development and operation. For example, both the Intel and Exponential Technology systems use extensive custom circuitry on the microprocessor chip to perform required operations to accommodate execution of x86 instructions. These operations can include translation from CISC instructions to RISC instructions as well as RISC and CISC instruction decoding and execution. The required circuitry is extremely large and complex and can therefore be difficult to develop and implement. Such increased overall processor chip complexity can result in a microprocessor that can be difficult and, therefore, expensive, to manufacture. It can also suffer from high error rates and reduced reliability. Furthermore, because more processing is done on-chip, the overall microprocessor processing efficiency can be substantially reduced.
The DEC software approach can also be inefficient. As with other computing functions, the x86 processing functions, including instruction translation, decoding and execution, can be performed more quickly in hardware than in software. A hardware approach is in general more efficient in terms of total processing load and, consequently, the microprocessor efficiency, than a software approach.